Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same.
Description of the Background Art
As a structure of an LDMOS (Laterally Diffused Metal Oxide Semiconductor) transistor, a structure described in Japanese Patent Laying-Open No. 2015-162581 (Patent Document 1) has been conventionally known. Patent Document 1 describes structures of a first LDMOS transistor and a second LDMOS transistor.
The first LDMOS transistor described in Patent Document 1 has a semiconductor substrate, an isolation insulating film, and a gate electrode. The semiconductor substrate has an upper surface. The semiconductor substrate has a source region and a drain region disposed in contact with the upper surface, a drift region disposed in contact with the upper surface so as to surround the drain region, and a well region sandwiched between the drift region and the source region and disposed in contact with the upper surface so as to surround the source region. The isolation insulating film is disposed on the upper surface side of the semiconductor substrate so as to be sandwiched between the drain region and the drift region. The gate electrode faces a portion of the well region sandwiched between the drift region and the source region, with being insulated from the portion by a gate insulating film.
In the first LDMOS transistor described in Patent Document 1, electric field concentration is likely to occur in the vicinity of an end of the isolation insulating film closer to a source. At a location where an electric field concentrates, carriers constituting a current are accelerated by the electric field and impact-ionized, and thereby hot carriers are likely to be generated. As a result, according to the first LDMOS transistor described in Patent Document 1, degradation of the gate insulating film due to hot carrier injection may occur.
The second LDMOS transistor described in Patent Document 1 has a structure for suppressing such degradation of the gate insulating film due to hot carrier injection. More specifically, in the second LDMOS transistor described in Patent Document 1, a gate electrode has a portion embedded in an isolation insulating film. In this point, the second LDMOS transistor described in Patent Document 1 is different from the first LDMOS transistor described in Patent Document 1.
In the second LDMOS transistor described in Patent Document 1, the portion of the gate electrode embedded in the isolation insulating film depletes a drift region in the vicinity of an end of the isolation insulating film closer to a source region, and alleviates electric field concentration in the vicinity of the end of the isolation insulating film closer to the source region. Thus, according to the second LDMOS transistor described in Patent Document 1, degradation of the gate insulating film due to hot carrier injection is suppressed.
As structures of other LDMOS transistors, a structure described in Japanese Patent Laying-Open No. 2009-49260 and a structure described in Japanese Patent Laying-Open No. 2005-26664 have been known.